Conventionally, in the case of manufacturing an electronic component with the use of a plurality of multilayer chips each composed of a laminated body having a plurality of ceramic layers and a plurality of internal electrode layers, external electrodes are formed on the multilayer chips by immersing, in a dip layer, the plurality of multilayer chips sandwiched by a jig.
In a method of applying a conductive paste, which is disclosed in Japanese Patent Application Laid-Open No. 06-204271, central parts of cuboidal chip components are coated with glass or resin, and a conductive paste is then applied thereto. More specifically, for a number of cuboidal chip components attached to a jig while ends to which the conductive paste is to be applied are aligned to a predetermined protrusion height, the ends of the cuboidal chip components are immersed along with the jib in the conductive paste in a bath to apply the conductive paste to the ends.